Center for Quantum Frontier of Research and Technology (Seminar)

Toward scaling spin-based quantum processor with semiconductor technology

Speaker : Prof. Chien-Yuan Chang (Dept. of Electrical Engineering, NTHU)
Time : 2024 / 05 / 20 12:10
Toward scaling spin-based quantum processor with semiconductor technology
Room 36173, 1F, Department of Physics, Science Building
This seminar explores the potential of building powerful quantum computers using spin qubits based on semiconductor technologies. We'll begin by introducing the fundamental concepts of spin qubit and the integration of spin qubits with photonic qubits, exploring their fundamental properties and potential applications. Secondly, we'll introduce walk through the recent advancements in single and two-qubit operations using single electron spin states. These demonstrations highlight the importance of material engineering and their critical role in building a large-scale quantum computing with spins.
The second part of the talk will provide a bird-eye view on the tailored Quantum Error-Correcting Codes (QECCs) for spin qubit-based processors. To unlock the full potential of spin qubits for large-scale processors, we'll investigate their performance with We'll focus on two specific distance-3 codes: the surface code and the Bacon-Shor code. We'll compare their performance using two encoding schemes: all Zeeman-type qubits and a hybrid scheme with Zeeman data qubits and singlet-triplet ancillary qubits. Our research demonstrates that the hybrid-qubit scheme offers a significant performance improvement (about 1 order of magnitude) compared to the all-Zeeman approach. These combined advancements in spin qubit technology and error correction strategies suggest a promising path towards building robust fault-tolerant quantum computers. The Bacon-Shor code with a hybrid qubit scheme appears to be a particularly strong candidate for achieving this goal.